In the area of testing communication systems, the interfaces between systems to be tested and their testers have great impact on test generation and fault detectability. Several t...
Gang Luo, Rachida Dssouli, Gregor von Bochmann, Pa...
Current synthesis methodologies based on hardwaredescription languages focus mainly on two distinct levels: behavior and register-transfer levels. In many practical cases, however...
for a state machine which is an abstraction for an existing sequential circuit, which can be useful for redesign or engineering change. The generated state machines can be further ...
Transaction Level Models are widely being used as high-level reference models during embedded systems development. High simulation speed and great modeling flexibility are the ma...
We describe a new synthesis procedure for designing asynchronous controllers from burst-mode specifications, a class of specifications allowing multiple input change fundamental m...