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» State Space Reduction Techniques for Component Interfaces
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ICCAD
1996
IEEE
121views Hardware» more  ICCAD 1996»
15 years 4 months ago
Identification of unsettable flip-flops for partial scan and faster ATPG
State justification is a time-consuming operation in test generation for sequential circuits. In this paper, we present a technique to rapidly identify state elements (flip-flops)...
Ismed Hartanto, Vamsi Boppana, W. Kent Fuchs
WSC
2001
15 years 1 months ago
Dimensionality analysis of a simulation outcome space
This paper investigates the dimensionality characteristics of the outcome space of a combat simulation. The independent state variables of all of the outcome states for a simulati...
John B. Gilmer Jr., Frederick J. Sullivan
CGF
2010
189views more  CGF 2010»
14 years 12 months ago
Space-in-Time and Time-in-Space Self-Organizing Maps for Exploring Spatiotemporal Patterns
Spatiotemporal data pose serious challenges to analysts in geographic and other domains. Owing to the complexity of the geospatial and temporal components, this kind of data canno...
Gennady L. Andrienko, Natalia V. Andrienko, Sebast...
CSFW
1999
IEEE
15 years 4 months ago
Athena: A New Efficient Automatic Checker for Security Protocol Analysis
We propose an efficient automatic checking algorithm, Athena, for analyzing security protocols. Athena incorporates a logic that can express security properties including authenti...
Dawn Xiaodong Song
EMSOFT
2007
Springer
15 years 6 months ago
Buffer optimization and dispatching scheme for embedded systems with behavioral transparency
Software components are modular and can enable post-deployment update, but their high overhead in runtime and memory is prohibitive for many embedded systems. This paper proposes ...
Jiwon Hahn, Pai H. Chou