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ISCA
2008
IEEE
137views Hardware» more  ISCA 2008»
15 years 8 months ago
Self-Optimizing Memory Controllers: A Reinforcement Learning Approach
Efficiently utilizing off-chip DRAM bandwidth is a critical issue in designing cost-effective, high-performance chip multiprocessors (CMPs). Conventional memory controllers deli...
Engin Ipek, Onur Mutlu, José F. Martí...
TASE
2008
IEEE
15 years 8 months ago
Verifying BPEL-Like Programs with Hoare Logic
The WS-BPEL language has recently become a de facto standard for modeling Web-based business processes. One of its essential features is the fully programmable compensation mechan...
Chenguang Luo, Shengchao Qin, Zongyan Qiu
DATE
2007
IEEE
99views Hardware» more  DATE 2007»
15 years 8 months ago
Instruction trace compression for rapid instruction cache simulation
Modern Application Specific Instruction Set Processors (ASIPs) have customizable caches, where the size, associativity and line size can all be customized to suit a particular ap...
Andhi Janapsatya, Aleksandar Ignjatovic, Sri Param...
GLOBECOM
2007
IEEE
15 years 8 months ago
V-BLAST Receiver for MIMO Relay Networks with Imperfect CSI
—Previous work demonstrated that the improvements in spectral efficiency and link reliability can be obtained in wireless relay networks employing terminals with MIMO capability...
Jiansong Chen, Xiaoli Yu, C. C. Jay Kuo
VTC
2007
IEEE
15 years 8 months ago
Channel Prediction Aided Coded Modulation Assisted Eigen-Beamforming
Abstract— Eigen-beamforming is capable of providing attractive performance gains in the context of Multiple-Input Multiple-Output (MIMO) systems, provided that accurate Channel S...
Soon Xin Ng, Wei Liu, Lie-Liang Yang, Lajos Hanzo