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» State machine models of timing and circuit design
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FPL
1999
Springer
103views Hardware» more  FPL 1999»
15 years 2 months ago
IP Validation for FPGAs Using Hardware Object Technology
Although verification and simulation tools are always improving, the results they provide remain hard to analyze and interpret. On one hand, verification sticks to the functional ...
Steve Casselman, John Schewel, Christophe Beaumont
ICML
2006
IEEE
15 years 10 months ago
Efficient inference on sequence segmentation models
Sequence segmentation is a flexible and highly accurate mechanism for modeling several applications. Inference on segmentation models involves dynamic programming computations tha...
Sunita Sarawagi
ASE
1999
126views more  ASE 1999»
14 years 9 months ago
Behaviour Analysis of Distributed Systems Using the Tracta Approach
Behaviour analysis should form an integral part of the software development process. This is particularly important in the design of concurrent and distributed systems, where comp...
Dimitra Giannakopoulou, Jeff Kramer, Shing-Chi Che...
SIGCSE
2008
ACM
153views Education» more  SIGCSE 2008»
14 years 8 months ago
A cross-domain visual learning engine for interactive generation of instructional materials
We present the design and development of a Visual Learning Engine, a tool that can form the basis for interactive development of visually rich teaching and learning modules across...
K. R. Subramanian, T. Cassen
ASPLOS
1996
ACM
15 years 2 months ago
An Integrated Compile-Time/Run-Time Software Distributed Shared Memory System
On a distributed memory machine, hand-coded message passing leads to the most efficient execution, but it is difficult to use. Parallelizing compilers can approach the performance...
Sandhya Dwarkadas, Alan L. Cox, Willy Zwaenepoel