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» State machine models of timing and circuit design
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CAV
2004
Springer
121views Hardware» more  CAV 2004»
15 years 1 months ago
CirCUs: A Satisfiability Solver Geared towards Bounded Model Checking
Abstract. CirCUs is a satisfiability solver that works on a combination of AndInverter-Graph, CNF clauses, and BDDs. It has been designed to work well with bounded model checking. ...
HoonSang Jin, Mohammad Awedh, Fabio Somenzi
SCESM
2006
ACM
266views Algorithms» more  SCESM 2006»
15 years 3 months ago
A comparative survey of scenario-based to state-based model synthesis approaches
Model Driven Development and Use Case Driven Development methodologies have inspired the proposal of a variety of software engineering approaches that synthesize statebased models...
Hongzhi Liang, Jürgen Dingel, Zinovy Diskin
ISCAS
2003
IEEE
172views Hardware» more  ISCAS 2003»
15 years 3 months ago
Performance modeling of resonant tunneling based RAMs
Tunneling based random-access memories (TRAM’s) have recently garnered a great amount of interests among the memory designers due to their intrinsic merits such as reduced power...
Hui Zhang, Pinaki Mazumder, Li Ding 0002, Kyoungho...
DAC
2003
ACM
15 years 11 months ago
Temporofunctional crosstalk noise analysis
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. This paper proposes a method of characterizing correlation of signal tra...
Donald Chai, Alex Kondratyev, Yajun Ran, Kenneth H...
RE
2010
Springer
14 years 4 months ago
A UML-based static verification framework for security
Secure software engineering is a new research area that has been proposed to address security issues during the development of software systems. This new area of research advocates...
Igor Siveroni, Andrea Zisman, George Spanoudakis