1186 search results - page 128 / 238 » State machine models of timing and circuit design |
SEE
1997
Springer
15 years 2 months ago
1997
Springer
A concise object-oriented method for the development of real-time systems has been composed. Hardware components are modelled by (sofnuare) base objects; base objects are controll...
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ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
Efficient communication modeling is a critical task in SoC design and exploration. In particular, fast and accurate communication is needed to predict the performance of a system....
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
Statistical timing analysis needs a priori knowledge of process variations. Lack of such a priori knowledge of process variations prevents accurate statistical timing analysis, fo...
VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
Predictive delay analysis is presented for a representative CMOS inverter with submicron device size using PREDICTMOS MOSFET model. As against SPICE, which adopts a time consuming...
GLVLSI
2009
IEEE
15 years 4 months ago
2009
IEEE
In the context of formal verification Bounded Model Checking (BMC) has shown to be very powerful for large industrial designs. BMC is used to check whether a circuit satisfies a...