1186 search results - page 141 / 238 » State machine models of timing and circuit design |
VMCAI
2005
Springer
15 years 3 months ago
2005
Springer
When a system fails to satisfy its specification, the model checker produces an error trace (or counter-example) that demonstrates an undesirable behavior, which is then used in d...
GLVLSI
2006
IEEE
15 years 4 months ago
2006
IEEE
Process variations have become a key concern of circuit designers because of their significant, yet hard to predict impact on performance and signal integrity of VLSI circuits. St...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
Simulation of transaction level models (TLMs) is an established embedded systems design technique. Its use cases include virtual prototyping for early software development, platfo...
CAISE
2005
Springer
15 years 3 months ago
2005
Springer
To achieve inter-enterprise software interoperability, the semantics of interchanged information by using electronic business documents, has to be explicitly modeled. A common appr...
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ECBS
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper describes a comprehensive prototype of large-scale fault adaptive embedded software developed for the proposed Fermilab BTeV high energy physics experiment. Lightweight...