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» State machine models of timing and circuit design
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MM
2004
ACM
114views Multimedia» more  MM 2004»
15 years 3 months ago
ChucK: a programming language for on-the-fly, real-time audio synthesis and multimedia
In this paper, we describe ChucK – a programming language and programming model for writing precisely timed, concurrent audio synthesis and multimedia programs. Precise concurre...
Ge Wang, Perry R. Cook
GLVLSI
2007
IEEE
153views VLSI» more  GLVLSI 2007»
14 years 11 months ago
Address generation for nanowire decoders
Nanoscale crossbars built from nanowires can form high density memories and programmable logic devices. To integrate such nanoscale devices with other circuits, nanowire decoders ...
Jia Wang, Ming-Yang Kao, Hai Zhou
FMSD
2007
110views more  FMSD 2007»
14 years 9 months ago
Exploiting interleaving semantics in symbolic state-space generation
Symbolic techniques based on Binary Decision Diagrams (BDDs) are widely employed for reasoning about temporal properties of hardware circuits and synchronous controllers. However, ...
Gianfranco Ciardo, Gerald Lüttgen, Andrew S. ...
DAC
2003
ACM
15 years 10 months ago
Seed encoding with LFSRs and cellular automata
Reseeding is used to improve fault coverage of pseudorandom testing. The seed corresponds to the initial state of the PRPG before filling the scan chain. In this paper, we present...
Ahmad A. Al-Yamani, Edward J. McCluskey
CODES
2008
IEEE
15 years 4 months ago
Static analysis for fast and accurate design space exploration of caches
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
Yun Liang, Tulika Mitra