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» State machine models of timing and circuit design
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ICCAD
1995
IEEE
127views Hardware» more  ICCAD 1995»
15 years 1 months ago
Hybrid decision diagrams
Abstract: Functions that map boolean vectors into the integers are important for the design and veri cation of arithmetic circuits. MTBDDs and BMDs have been proposed for represent...
Edmund M. Clarke, Masahiro Fujita, Xudong Zhao
EMSOFT
2006
Springer
15 years 1 months ago
Analysis of the zeroconf protocol using UPPAAL
We report on a case study in which the model checker Uppaal is used to formally model parts of Zeroconf, a protocol for dynamic configuration of IPv4 link-local addresses that has...
Biniam Gebremichael, Frits W. Vaandrager, Miaomiao...
RV
2010
Springer
220views Hardware» more  RV 2010»
14 years 7 months ago
Runtime Verification with the RV System
The RV system is the first system to merge the benefits of Runtime Monitoring with Predictive Analysis. The Runtime Monitoring portion of RV is based on the successful Monitoring O...
Patrick O'Neil Meredith, Grigore Rosu
ISAAC
2007
Springer
158views Algorithms» more  ISAAC 2007»
15 years 4 months ago
On the Expressive Power of Planar Perfect Matching and Permanents of Bounded Treewidth Matrices
Valiant introduced some 25 years ago an algebraic model of computation along with the complexity classes VP and VNP, which can be viewed as analogues of the classical classes P and...
Uffe Flarup, Pascal Koiran, Laurent Lyaudet
PADS
2005
ACM
15 years 3 months ago
Performance Benchmark of a Parallel and Distributed Network Simulator
Simulation of large-scale networks requires enormous amounts of memory and processing time. One way of speeding up these simulations is to distribute the model over a number of co...
Samson Lee, John Leaney, Tim O'Neill, Mark Hunter