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» State machine models of timing and circuit design
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MICRO
2007
IEEE
135views Hardware» more  MICRO 2007»
15 years 4 months ago
Microarchitectural Design Space Exploration Using an Architecture-Centric Approach
The microarchitectural design space of a new processor is too large for an architect to evaluate in its entirety. Even with the use of statistical simulation, evaluation of a sing...
Christophe Dubach, Timothy M. Jones, Michael F. P....
DATE
2006
IEEE
108views Hardware» more  DATE 2006»
15 years 3 months ago
Software-friendly HW/SW co-simulation: an industrial case study
This paper proposes a novel HW/SW co-simulation approach that minimizes the impact on software designers. We propose a SystemC-based system that enables the software team to test ...
Juanjo Noguera, Luis Baldez, Narcis Simon, Lluis A...
ICC
2007
IEEE
193views Communications» more  ICC 2007»
15 years 4 months ago
Power-Aware MAC for MultiHop Wireless Networks: A Cross Layer Approach
— This paper addresses the problem of designing a power-aware Multiple Access Control (MAC) protocol for Multihop Wireless Networks (MHWN). The problem is formulated as a cross l...
Abdorasoul Ghasemi, Karim Faez
ISCA
1997
IEEE
137views Hardware» more  ISCA 1997»
15 years 2 months ago
A Language for Describing Predictors and Its Application to Automatic Synthesis
As processor architectures have increased their reliance on speculative execution to improve performance, the importance of accurate prediction of what to execute speculatively ha...
Joel S. Emer, Nicholas C. Gloy
SAC
2006
ACM
15 years 3 months ago
Post-partition reconciliation protocols for maintaining consistency
This paper addresses design exploration for protocols that are employed in systems with availability-consistency tradeoffs. Distributed data is modelled as states of objects repl...
Mikael Asplund, Simin Nadjm-Tehrani