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» State machine models of timing and circuit design
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AINA
2009
IEEE
15 years 4 months ago
A Range-Only Tracking Algorithm for Wireless Sensor Networks
Over the last few years, target tracking in wireless sensor networks has become a topic of particular interest. This paper presents a tracking system intended for deployment in di...
Evangelos B. Mazomenos, Jeffrey S. Reeve, Neil M. ...
WSC
1997
14 years 11 months ago
Long-Lasting Transient Conditions in Simulations with Heavy-Tailed Workloads
Recent evidence suggests that some characteristics of computer and telecommunications systems may be well described using heavy tailed distributions — distributions whose tail d...
Mark Crovella, Lester Lipsky
DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
15 years 4 months ago
Layout to Logic Defect Analysis for Hierarchical Test Generation
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
Maksim Jenihhin, Jaan Raik, Raimund Ubar, Witold A...
FPGA
2003
ACM
161views FPGA» more  FPGA 2003»
15 years 3 months ago
Implementation of BEE: a real-time large-scale hardware emulation engine
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, R...
GECCO
2008
Springer
177views Optimization» more  GECCO 2008»
14 years 11 months ago
Reduced computation for evolutionary optimization in noisy environment
Evolutionary Algorithms’ (EAs’) application to real world optimization problems often involves expensive fitness function evaluation. Naturally this has a crippling effect on ...
Maumita Bhattacharya