1186 search results - page 50 / 238 » State machine models of timing and circuit design |
ICCD
2006
IEEE
15 years 6 months ago
2006
IEEE
Abstract— Gate leakage (direct tunneling current for sub65nm CMOS) can severely affect both the transient and steady state behaviors of CMOS circuits. In this paper we quantify t...
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
In this paper, we present a technique to design and verify the Look-Aside (LA-1) Interface standard used in network processors. Our design flow includes several refinements starti...
COLT
2008
Springer
14 years 11 months ago
2008
Springer
We define a model of learning probabilistic acyclic circuits using value injection queries, in which an arbitrary subset of wires is set to fixed values, and the value on the sing...
AC
2003
Springer
15 years 3 months ago
2003
Springer
Abstract. As semiconductor technology strides towards billions of transistors on a single die, problems concerned with deep sub-micron process features and design productivity call...
ASPDAC
2006
ACM
15 years 3 months ago
2006
ACM
Power consumption has gained much saliency in circuit design recently. One design problem is modelled as ”Under a timing constraint, to minimize power as much as possible”. Pr...