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» State machine models of timing and circuit design
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DAC
2007
ACM
15 years 10 months ago
Global Critical Path: A Tool for System-Level Timing Analysis
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea...
ICCAD
1997
IEEE
127views Hardware» more  ICCAD 1997»
15 years 2 months ago
OPTIMIST: state minimization for optimal 2-level logic implementation
We present a novel method for state minimization of incompletely-specified finite state machines. Where classic methods simply minimize the number of states, ours directly addre...
Robert M. Fuhrer, Steven M. Nowick
ICCD
2007
IEEE
182views Hardware» more  ICCD 2007»
15 years 4 months ago
Reducing leakage power in peripheral circuits of L2 caches
Leakage power has grown significantly and is a major challenge in microprocessor design. Leakage is the dominant power component in second-level (L2) caches. This paper presents t...
Houman Homayoun, Alexander V. Veidenbaum
JMLR
2010
169views more  JMLR 2010»
14 years 4 months ago
Factored 3-Way Restricted Boltzmann Machines For Modeling Natural Images
Deep belief nets have been successful in modeling handwritten characters, but it has proved more difficult to apply them to real images. The problem lies in the restricted Boltzma...
Marc'Aurelio Ranzato, Alex Krizhevsky, Geoffrey E....
ICCAD
2006
IEEE
169views Hardware» more  ICCAD 2006»
15 years 6 months ago
Microarchitecture parameter selection to optimize system performance under process variation
Abstract— Design variability due to within-die and die-todie process variations has the potential to significantly reduce the maximum operating frequency and the effective yield...
Xiaoyao Liang, David Brooks