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» State machine models of timing and circuit design
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CORR
2011
Springer
149views Education» more  CORR 2011»
14 years 5 months ago
General Iteration graphs and Boolean automata circuits
This article is set in the eld of regulation networks modeled by discrete dynamical systems. It focuses on Boolean automata networks. In such networks, there are many ways to upd...
Mathilde Noual
VLSID
1999
IEEE
122views VLSI» more  VLSID 1999»
15 years 2 months ago
Formal Verification of an ARM Processor
This paper presents a detailed description of the application of a formal verification methodology to an ARM processor. The processor, a hybrid between the ARM7 and the StrongARM ...
Vishnu A. Patankar, Alok Jain, Randal E. Bryant
VLC
2002
118views more  VLC 2002»
14 years 10 months ago
Modeling Behaviors of Interactive Objects for Real-Time Virtual Environments
Real-time 3D graphics are being extensively used to build interactive virtual environments for a number of different applications. In many situations, virtual objects are required...
Marcelo Kallmann, Daniel Thalmann
ICML
2006
IEEE
15 years 11 months ago
Dynamic topic models
A family of probabilistic time series models is developed to analyze the time evolution of topics in large document collections. The approach is to use state space models on the n...
David M. Blei, John D. Lafferty
TC
1998
14 years 10 months ago
Abstraction Techniques for Validation Coverage Analysis and Test Generation
ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be...
Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Ho...