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» State machine models of timing and circuit design
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80
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IANDC
2010
84views more  IANDC 2010»
14 years 8 months ago
Underapproximation for model-checking based on universal circuits
For two naturals m, n such that m < n, we show how to construct a circuit C with m inputs and n outputs, that has the following property: for some 0 ≤ k ≤ m, the circuit deï...
Arie Matsliah, Ofer Strichman
SLIP
2003
ACM
15 years 3 months ago
Fast estimation of the partitioning rent characteristic using a recursive partitioning model
In the past, a priori interconnect prediction, based on Rent’s rule, has been applied mainly for technology evaluation and roadmap applications. These applications do not requir...
Joni Dambre, Dirk Stroobandt, Jan Van Campenhout
104
Voted
ISPD
2005
ACM
205views Hardware» more  ISPD 2005»
15 years 3 months ago
Coupling aware timing optimization and antenna avoidance in layer assignment
The sustained progress of VLSI technology has altered the landscape of routing which is a major physical design stage. For timing driven routings, traditional approaches which con...
Di Wu, Jiang Hu, Rabi N. Mahapatra
86
Voted
AHS
2006
IEEE
113views Hardware» more  AHS 2006»
15 years 1 months ago
A Honeycomb Development Architecture for Robust Fault-Tolerant Design
A new hardware developmental model that shows strong robust transient fault-tolerant abilities and is motivated by embryonic development and a honeycomb structure is presented. Ca...
Andy M. Tyrrell, Hong Sun
112
Voted
FLAIRS
2000
14 years 11 months ago
Autonomous Automobile Behavior through Context-Based Reasoning
Today's driving simulators are used in vehicle research and design as well as in training. However, most simulators are not convincing because the degree of realism is not ad...
Fernando G. Gonzalez, Patrick Grejs, Avelino J. Go...