1186 search results - page 74 / 238 » State machine models of timing and circuit design |
84
Voted
ICCAD
2005
IEEE
15 years 7 months ago
2005
IEEE
— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...
DAC
2004
ACM
15 years 11 months ago
2004
ACM
Current technology trends have led to the growing impact of both inter-die and intra-die process variations on circuit performance. While it is imperative to model parameter varia...
94
Voted
SPIN
2004
Springer
15 years 3 months ago
2004
Springer
Abstract. We present a technique and a tool for model-checking operational UML models based on a mapping of object oriented UML models into a framework of communicating extended ti...
FPGA
2010
ACM
14 years 8 months ago
2010
ACM
Metastability is a phenomenon that can cause system failures in digital circuits. It may occur whenever signals are being transmitted across asynchronous or unrelated clock domain...
81
Voted
ISSTA
2004
ACM
15 years 3 months ago
2004
ACM
Two operations commute if executing them serially in either order results in the same change of state. In a system in which commands may be issued simultaneously by different use...