1186 search results - page 75 / 238 » State machine models of timing and circuit design |
80
Voted
WCRE
2002
IEEE
15 years 3 months ago
2002
IEEE
Today, software-engineering research and industry alike recognize the need for practical tools to support reverseengineering activities. Most of the well-known CASE tools support ...
112
Voted
WSC
2004
14 years 11 months ago
2004
We discuss ASAP3, a refinement of the batch means algorithms ASAP and ASAP2. ASAP3 is a sequential procedure designed to produce a confidence-interval estimator for the expected r...
DATE
1999
IEEE
15 years 2 months ago
1999
IEEE
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
ICCD
2000
IEEE
15 years 7 months ago
2000
IEEE
This paper is concerned with the analysis and optimization of the ground bounce in digital CMOS circuits. First, an analytical method for calculating of the ground bounce is presen...
90
Voted
ET
2000
14 years 10 months ago
2000
The paper presents a novel hierarchical approach to test pattern generation for sequential circuits based on an input model of mixed-level decision diagrams. A method that handles,...