1186 search results - page 78 / 238 » State machine models of timing and circuit design |
99
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CORR
2006
Springer
14 years 10 months ago
2006
Springer
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator. In this paper...
102
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TABLEAUX
1998
Springer
15 years 2 months ago
1998
Springer
ple (Extended Abstract) Edmund M. Clarke and Sergey Berezin Carnegie Mellon University -- USA Model checking is an automatic verification technique for finite state concurrent syst...
129
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REPLICATION
2010
14 years 8 months ago
2010
In this chapter, we discuss a widely used fault-tolerant data replication model called virtual synchrony. The model responds to two kinds of needs. First, there is the practical qu...
COCO
2010
Springer
15 years 5 days ago
2010
Springer
—A space bounded Stack Machine is a regular Turing Machine with a read-only input tape, several space bounded read-write work tapes, and an unbounded stack. Stack Machines with a...
CASES
2006
ACM
15 years 1 months ago
2006
ACM
We present a new technique for compiling run-time reconfigurable hardware designs. Run-time reconfigurable embedded systems can deliver promising benefits over implementations in ...