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» State machine models of timing and circuit design
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APLAS
2010
ACM
14 years 8 months ago
Live Heap Space Bounds for Real-Time Systems
Live heap space analyses have so far been concerned with the standard sequential programming model. However, that model is not very well suited for embedded real-time systems, wher...
Martin Kero, Pawel Pietrzak, Johan Nordlander
CDES
2006
146views Hardware» more  CDES 2006»
14 years 11 months ago
ANN-Based Spiral Inductor Parameter Extraction and Layout Re-Design
A neural network approach is presented for modeling and characterization of on-chip copper spiral inductors. The approach involves the creation of neural network models to map 3D ...
Abby A. Ilumoka, Yeonbum Park
ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
15 years 3 months ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...
ICES
2000
Springer
140views Hardware» more  ICES 2000»
15 years 1 months ago
Evolving Cellular Automata for Self-Testing Hardware
Testing is a key issue in the design and production of digital circuits: the adoption of BIST (Built-In Self-Test) techniques is increasingly popular, but requires efficient algori...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
MCS
2006
Springer
14 years 10 months ago
Architectural concepts and Design Patterns for behavior modeling and integration
The design of the control software for complex systems is a difficult task. It requires the modeling, the simulation, the integration and the adaptation of a multitude of intercon...
Jean-Marc Perronne, Laurent Thiry, Bernard Thirion