1186 search results - page 84 / 238 » State machine models of timing and circuit design |
45
Voted
CHI
2003
ACM
15 years 10 months ago
2003
ACM
Cameras provide an appealing new input medium for interaction. The creation of camera-based interfaces is outside the skill-set of most programmers and completely beyond the skill...
75
Voted
JMLR
2006
14 years 10 months ago
2006
An essential step in designing a new computer architecture is the careful examination of different design options. It is critical that computer architects have efficient means by ...
80
Voted
EOR
2007
14 years 10 months ago
2007
The paper proposes a preventive maintenance (PM) planning model for the performance improvement of cellular manufacturing systems (CMS) in terms of machine reliability, and resour...
DAC
1999
ACM
15 years 11 months ago
1999
ACM
A 550MHz 64b PowerPC processor was developed for fabrication in Silicon-On-Insulator (SOI) technology from a processor previously designed and fabricated in bulk CMOS [1]. Both th...
ICCD
2004
IEEE
15 years 7 months ago
2004
IEEE
A cache access time model, PRACTICS (PRedictor of Access and Cycle TIme for Cache Stack), has been developed to optimize the memory array architecture for the minimum access and c...