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» State machine models of timing and circuit design
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ASPDAC
2004
ACM
169views Hardware» more  ASPDAC 2004»
15 years 3 months ago
Design of real-time VGA 3-D image sensor using mixed-signal techniques
— We have developed the first real-time 3-D image sensor with VGA pixel resolution using mixed-signal techniques to achieve high-speed and high-accuracy range calculation based ...
Yusuke Oike, Makoto Ikeda, Kunihiro Asada
105
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CASES
2006
ACM
15 years 4 months ago
Automatic performance model construction for the fast software exploration of new hardware designs
Developing an optimizing compiler for a newly proposed architecture is extremely difficult when there is only a simulator of the machine available. Designing such a compiler requ...
John Cavazos, Christophe Dubach, Felix V. Agakov, ...
TASE
2008
IEEE
14 years 9 months ago
Steady-State Throughput and Scheduling Analysis of Multicluster Tools: A Decomposition Approach
Abstract--Cluster tools are widely used as semiconductor manufacturing equipment. While throughput analysis and scheduling of single-cluster tools have been well-studied, research ...
Jingang Yi, Shengwei Ding, Dezhen Song, Mike Tao Z...
ATS
2009
IEEE
92views Hardware» more  ATS 2009»
14 years 8 months ago
M-IVC: Using Multiple Input Vectors to Minimize Aging-Induced Delay
Negative bias temperature instability (NBTI) has been a significant reliability concern in current digital circuit design due to its effect of increasing the path delay with time a...
Song Jin, Yinhe Han, Lei Zhang 0008, Huawei Li, Xi...
EMSOFT
2006
Springer
15 years 1 months ago
A timing model for synchronous language implementations in simulink
We describe a simple scheme for mapping synchronous language models, in the form of Boolean Mealy Machines, into timed automata. The mapping captures certain idealized implementat...
Timothy Bourke, Arcot Sowmya