3 search results - page 1 / 1 » Static Pattern Predictor (SPP) Based Low Power Instruction C... |
115
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CSREAESA
2003
14 years 11 months ago
2003
Energy dissipation in cache memories is becoming a major design issue in embedded microprocessors. Predictive filter cache based instruction cache hierarchy is effective in reduci...
140
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HPCA
2004
IEEE
15 years 9 months ago
2004
IEEE
Recent research suggests that there are large variations in a cache's spatial usage, both within and across programs. Unfortunately, conventional caches typically employ fixe...
IPCCC
2006
IEEE
15 years 3 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...