306 search results - page 27 / 62 » Statistical Delay Modeling in Logic Design and Synthesis |
113
click to vote
CDC
2008
IEEE
15 years 8 months ago
2008
IEEE
— We present a decentralized, communication-less approach to the dynamic allocation of a swarm of homogeneous robots to a target distribution among multiple sites. Building on ou...
103
Voted
ISSS
1995
IEEE
15 years 5 months ago
1995
IEEE
We present an integrated approach aimed at predicting layout area needed to implement a behavioral description for a given performance goal. Our approach is novel because: (1) it ...
120
Voted
DATE
2006
IEEE
15 years 8 months ago
2006
IEEE
Abstract— Continuing scaling of CMOS technology has allowed aggressive pursuant of increased clock rate in DSM chips. The ever shorter clock period has made switching times of di...
137
Voted
QEST
2010
IEEE
14 years 11 months ago
2010
IEEE
Adaptive techniques like voltage and frequency scaling, process variations and the randomness of input data contribute signi cantly to the statistical aspect of contemporary hardwa...
127
Voted
DAC
2003
ACM
16 years 2 months ago
2003
ACM
In the way they cope with variability, present-day methodologies are onerous, pessimistic and risky, all at the same time! Dealing with variability is an increasingly important as...