306 search results - page 32 / 62 » Statistical Delay Modeling in Logic Design and Synthesis |
83
Voted
DATE
2007
IEEE
15 years 8 months ago
2007
IEEE
Despite the progress of the last decades in electronic design automation, arithmetic circuits have always received way less attention than other classes of digital circuits. Logic...
132
Voted
EUROGP
2009
Springer
15 years 6 months ago
2009
Springer
The contribution presented herein proposes an adaptive genetic algorithm applied to quantum logic circuit synthesis that, dynamically adjusts its control parameters. The adaptation...
121
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DSN
2002
IEEE
15 years 6 months ago
2002
IEEE
This paper examines the effect of technology scaling and microarchitectural trends on the rate of soft errors in CMOS memory and logic circuits. We describe and validate an end-to...
129
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CAV
2010
Springer
14 years 12 months ago
2010
Springer
We describe Breach, a Matlab toolbox providing a coherent set of simulation-based techniques aimed at the analysis of deterministic models of hybrid dynamical systems. The primary ...
119
Voted
ISVLSI
2005
IEEE
15 years 7 months ago
2005
IEEE
— Direct tunneling current is the major component of static power dissipation of a CMOS circuit for technology below 65nm, where the gate dielectric (SiO2) is very low. We intuit...