306 search results - page 45 / 62 » Statistical Delay Modeling in Logic Design and Synthesis |
131
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DAC
2004
ACM
16 years 2 months ago
2004
ACM
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...
TASLP
2010
15 years 6 days ago
2010
—The digital emulation of analog audio effects and synthesis components, through the simulation of lumped circuit components has seen a large amount of activity in recent years; ...
126
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ICTIR
2009
Springer
14 years 11 months ago
2009
Springer
Abstract. A mismatch between differenteventspaceshasbeen used toargue against rank equivalence of classic probabilistic models of information retrieval and language models. We ques...
121
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AINA
2007
IEEE
15 years 8 months ago
2007
IEEE
In the Ad-Hoc InfoWare project, we develop a delay tolerant event notification service for sparse Mobile Ad-Hoc Networks for emergency and rescue operations. In most event notific...
ICCAD
2008
IEEE
15 years 10 months ago
2008
IEEE
—To overcome the energy-efficiency limitations imposed by finite sub-threshold slope in CMOS transistors, this paper explores the design of integrated circuits based on nanoelect...