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DAC
2006
ACM
15 years 1 months ago
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
David Atienza, Pablo Garcia Del Valle, Giacomo Pac...
CVPR
2010
IEEE
15 years 8 months ago
Curious Snakes: a minimum-latency solution to the cluttered background problem in active contours
We present a region-based active contour detection algorithm for objects that exhibit relatively homogeneous photometric characteristics (e.g. smooth color or gray levels), embe...
Ganesh Sundaramoorthi, Stefano Soatto, Anthony Yez...
DIMVA
2007
15 years 1 months ago
A Study of Malcode-Bearing Documents
By exploiting the object-oriented dynamic composability of modern document applications and formats, malcode hidden in otherwise inconspicuous documents can reach third-party appli...
Wei-Jen Li, Salvatore J. Stolfo, Angelos Stavrou, ...
106
Voted
JVCIR
2006
88views more  JVCIR 2006»
14 years 11 months ago
Morphological wavelet-based stereo image coders
In this paper, we propose a family of novel stereoscopic image coders based on morphological coding and a block-based disparity compensation algorithm. The proposed schemes employ...
J. N. Ellinas, M. S. Sangriotis
ICCD
2001
IEEE
124views Hardware» more  ICCD 2001»
15 years 8 months ago
High-Level Power Modeling of CPLDs and FPGAs
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
Li Shang, Niraj K. Jha