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» Statistical Modeling for Circuit Simulation
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ICCAD
2008
IEEE
200views Hardware» more  ICCAD 2008»
14 years 9 months ago
Accurate Equivalent Energy Breakeven Time Estimation for Power Gating
Run-time Power Gating (RTPG) is a recent technique, which aims at aggressively reducing leakage power consumption. Energy breakeven time (EBT), or equivalent sleep time has been pr...
Hao Xu, Wen-Ben Jone, Ranga Vemuri
ICCD
2004
IEEE
103views Hardware» more  ICCD 2004»
16 years 4 days ago
A Fast Delay Analysis Algorithm for The Hybrid Structured Clock Network
This paper presents a novel approach to reducing the complexity of the transient linear circuit analysis for a hybrid structured clock network. Topology reduction is first used to...
Yi Zou, Yici Cai, Qiang Zhou, Xianlong Hong, Sheld...
DAC
1998
ACM
16 years 4 months ago
Figures of Merit to Characterize the Importance of On-Chip Inductance
- A closed form solution for the output signal of a CMOS inverter driving an RLC transmission line is presented. This solution is based on the alpha power law for deep submicromete...
Yehea I. Ismail, Eby G. Friedman, José Luis...
JMLR
2008
83views more  JMLR 2008»
15 years 3 months ago
Evidence Contrary to the Statistical View of Boosting
The statistical perspective on boosting algorithms focuses on optimization, drawing parallels with maximum likelihood estimation for logistic regression. In this paper we present ...
David Mease, Abraham Wyner
ASPDAC
2000
ACM
111views Hardware» more  ASPDAC 2000»
15 years 7 months ago
Gate-level aged timing simulation methodology for hot-carrier reliability assurance
- This paper presents a new aged timing simulation methodology that can be used for hot-carrier reliability assurance of VLSI. This methodology consists of a compact model and a un...
Yoshiyuki Kawakami, Jingkun Fang, Hirokazu Yonezaw...