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» Statistical Modeling for Circuit Simulation
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96
Voted
ISQED
2010
IEEE
177views Hardware» more  ISQED 2010»
15 years 7 months ago
Multi-corner, energy-delay optimized, NBTI-aware flip-flop design
With the CMOS transistors being scaled to sub 45nm and lower, Negative Bias Temperature Instability (NBTI) has become a major concern due to its impact on PMOS transistor aging pr...
Hamed Abrishami, Safar Hatami, Massoud Pedram
86
Voted
ISQED
2009
IEEE
117views Hardware» more  ISQED 2009»
15 years 7 months ago
Adaptive voltage controlled nanoelectronic addressing for yield, accuracy and resolution
An outstanding challenge for realizing nanoelectronic systems is nano-interface design, i.e., how to precisely access a nanoscale wire in an array for communication between a nano...
Bao Liu
ISQED
2006
IEEE
259views Hardware» more  ISQED 2006»
15 years 6 months ago
Impact of NBTI on SRAM Read Stability and Design for Reliability
— Negative Bias Temperature Instability (NBTI) has the potential to become one of the main show-stoppers of circuit reliability in nanometer scale devices due to its deleterious ...
Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatneka...
79
Voted
ISCAS
1999
IEEE
77views Hardware» more  ISCAS 1999»
15 years 5 months ago
A low-voltage translinear second-order quadrature oscillator
This paper describes the design of a low-voltage translinear second-order quadrature oscillator. The circuit is a direct implementation of a nonlinear second-order state-space desc...
Wouter A. Serdijn, J. Mulder, Michiel H. L. Kouwen...
113
Voted
DAC
2010
ACM
15 years 4 months ago
Representative path selection for post-silicon timing prediction under variability
The identification of speedpaths is required for post-silicon (PS) timing validation, and it is currently becoming timeconsuming due to manufacturing variations. In this paper we...
Lin Xie, Azadeh Davoodi