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115
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ICCAD
2006
IEEE
169views Hardware» more  ICCAD 2006»
15 years 9 months ago
Microarchitecture parameter selection to optimize system performance under process variation
Abstract— Design variability due to within-die and die-todie process variations has the potential to significantly reduce the maximum operating frequency and the effective yield...
Xiaoyao Liang, David Brooks
TCC
2007
Springer
102views Cryptology» more  TCC 2007»
15 years 6 months ago
Perfect NIZK with Adaptive Soundness
Abstract. This paper presents a very simple and efficient adaptivelysound perfect NIZK argument system for any NP-language. In contrast to recently proposed schemes by Groth, Ostro...
Masayuki Abe, Serge Fehr
134
Voted
FPL
2008
Springer
207views Hardware» more  FPL 2008»
15 years 2 months ago
Bitstream compression techniques for Virtex 4 FPGAs
This paper examines the opportunity of using compression for accelerating the (re)configuration of FPGA devices, focusing on the choice of compression algorithms, and their hardwa...
Radu Stefan, Sorin Dan Cotofana
JSA
2006
113views more  JSA 2006»
15 years 18 days ago
A power-efficient TCAM architecture for network forwarding tables
Stringent memory access and search speed requirements are two of the main bottlenecks in wire speed processing. Most viable search engines are implemented in content addressable m...
Taskin Koçak, Faysal Basci
DAC
2008
ACM
15 years 2 months ago
DeMOR: decentralized model order reduction of linear networks with massive ports
Model order reduction is an efficient technique to reduce the system complexity while producing a good approximation of the input-output behavior. However, the efficiency of reduc...
Boyuan Yan, Lingfei Zhou, Sheldon X.-D. Tan, Jie C...