Abstract— Design variability due to within-die and die-todie process variations has the potential to significantly reduce the maximum operating frequency and the effective yield...
Abstract. This paper presents a very simple and efficient adaptivelysound perfect NIZK argument system for any NP-language. In contrast to recently proposed schemes by Groth, Ostro...
This paper examines the opportunity of using compression for accelerating the (re)configuration of FPGA devices, focusing on the choice of compression algorithms, and their hardwa...
Stringent memory access and search speed requirements are two of the main bottlenecks in wire speed processing. Most viable search engines are implemented in content addressable m...
Model order reduction is an efficient technique to reduce the system complexity while producing a good approximation of the input-output behavior. However, the efficiency of reduc...
Boyuan Yan, Lingfei Zhou, Sheldon X.-D. Tan, Jie C...