1459 search results - page 58 / 292 » Statistical Modeling for Circuit Simulation |
WSC
1998
15 years 1 months ago
1998
Bootstrapping is a resampling technique that requires less computer time than simulation does. Bootstrapping -like simulation-must be defined for each type of application. This pa...
ASPDAC
2006
ACM
15 years 5 months ago
2006
ACM
— Sakurai-Newton (SN) delay metric [1] is a widely used closed form delay metric for CMOS gates because of simplicity and reasonable accuracy. Nevertheless it can be shown that t...
103
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DATE
2009
IEEE
2009
IEEE
Analyzing the impact of process variations on parametric measurements: Novel models and applications
15 years 6 months ago
Abstract—In this paper we propose a novel statistical framework to model the impact of process variations on semiconductor circuits through the use of process sensitive test stru...
ICCAD
2008
IEEE
15 years 8 months ago
2008
IEEE
Statistical static timing analysis (SSTA) has emerged as an essential tool for nanoscale designs. Monte Carlo methods are universally employed to validate the accuracy of the appr...
ICCAD
2006
IEEE
15 years 8 months ago
2006
IEEE
Statistical Static Timing Analysis has received wide attention recently and emerged as a viable technique for manufacturability analysis. To be useful, however, it is important th...