1459 search results - page 72 / 292 » Statistical Modeling for Circuit Simulation |
GLVLSI
2006
IEEE
15 years 5 months ago
2006
IEEE
In this paper we have applied statistical sizing in an industrial setting. Efficient implementation of the statistical sizing algorithm is achieved by utilizing a dedicated interi...
DELTA
2002
IEEE
15 years 4 months ago
2002
IEEE
A new method for hierarchical fault simulation based on multi-level Decision Diagrams (DD) is proposed. We suppose that a register transfer (RT) level information along with gate-...
114
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VTS
2000
IEEE
15 years 4 months ago
2000
IEEE
The performance of deep sub-micron designs can be affected by various parametric variations, manufacturing defects, noise or even modeling errors that are all statistical in natur...
IWANN
1995
Springer
15 years 3 months ago
1995
Springer
This paper presents a comparative analysis of neural networks, simulated annealing, and genetic algorithms in the determination of input patterns for testing analog circuits. The ...
118
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PATMOS
2007
Springer
15 years 6 months ago
2007
Springer
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...