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» Statistical Timing Based Optimization using Gate Sizing
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ITCC
2005
IEEE
15 years 3 months ago
Pareto-Optimal Hardware for Substitution Boxes
: In this paper, we propose a methodology based on genetic programming to automatically generate hardware designs of substitution boxes necessary for many cryptosystems such as DES...
Nadia Nedjah, Luiza de Macedo Mourelle
ICCAD
1998
IEEE
95views Hardware» more  ICCAD 1998»
15 years 2 months ago
Efficient analog circuit synthesis with simultaneous yield and robustness optimization
This paper presents an efficient statistical design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The s...
Geert Debyser, Georges G. E. Gielen
95
Voted
BMCBI
2008
153views more  BMCBI 2008»
14 years 10 months ago
Estimating the size of the solution space of metabolic networks
Background: Cellular metabolism is one of the most investigated system of biological interactions. While the topological nature of individual reactions and pathways in the network...
Alfredo Braunstein, Roberto Mulet, Andrea Pagnani
COCOA
2009
Springer
15 years 2 months ago
Variable-Size Rectangle Covering
Abstract. In wireless communication networks, optimal use of the directional antenna is very important. The directional antenna coverage (DAC) problem is to cover all clients with ...
Francis Y. L. Chin, Hing-Fung Ting, Yong Zhang
IPCCC
2007
IEEE
15 years 4 months ago
Compiler-Directed Functional Unit Shutdown for Microarchitecture Power Optimization
Leakage power is a major concern in current microarchitectures as it is increasing exponentially with decreasing transistor feature sizes. In this paper, we present a technique ca...
Santosh Talli, Ram Srinivasan, Jeanine Cook