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» Statistical Timing Based Optimization using Gate Sizing
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PATMOS
2005
Springer
15 years 3 months ago
Power - Performance Optimization for Custom Digital Circuits
This paper presents a modular optimization framework for custom digital circuits in the power – performance space. The method uses a static timer and a nonlinear optimizer to max...
Radu Zlatanovici, Borivoje Nikolic
STOC
1997
ACM
122views Algorithms» more  STOC 1997»
15 years 2 months ago
Fault-Tolerant Quantum Computation With Constant Error
Shor has showed how to perform fault tolerant quantum computation when the probability for an error in a qubit or a gate, η, decays with the size of the computation polylogarithmi...
Dorit Aharonov, Michael Ben-Or
WSC
2007
15 years 15 days ago
Optimizing time warp simulation with reinforcement learning techniques
Adaptive Time Warp protocols in the literature are usually based on a pre-defined analytic model of the system, expressed as a closed form function that maps system state to cont...
Jun Wang, Carl Tropper
78
Voted
BMCBI
2010
86views more  BMCBI 2010»
14 years 10 months ago
Mining protein loops using a structural alphabet and statistical exceptionality
Background: Protein loops encompass 50% of protein residues in available three-dimensional structures. These regions are often involved in protein functions, e.g. binding site, ca...
Leslie Regad, Juliette Martin, Grégory Nuel...
96
Voted
ICCAD
1995
IEEE
134views Hardware» more  ICCAD 1995»
15 years 1 months ago
A delay model for logic synthesis of continuously-sized networks
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
Joel Grodstein, Eric Lehman, Heather Harkness, Bil...