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» Statistical Timing Based Optimization using Gate Sizing
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ASPDAC
2009
ACM
152views Hardware» more  ASPDAC 2009»
15 years 4 months ago
A novel Toffoli network synthesis algorithm for reversible logic
—Reversible logic studies have promising potential on energy lossless circuit design, quantum computation, nanotechnology, etc. Reversible logic features a one-to-one input outpu...
Yexin Zheng, Chao Huang
ICIP
2007
IEEE
15 years 12 months ago
Multi-Scale Statistical Detection and Ballistic Imaging Through Turbid Media
We exploit recent advances in the physical design of fast optical systems which enable active imaging with "ballistic" light. In this modality, fast bursts of optical en...
Sina Farsiu, Peyman Milanfar
DAC
1997
ACM
15 years 2 months ago
An Improved Algorithm for Minimum-Area Retiming
The concept of improving the timing behavior of a circuit by relocating flip-flops is called retiming and was first presented by Leiserson and Saxe. The ASTRA algorithm propose...
Naresh Maheshwari, Sachin S. Sapatnekar
86
Voted
ASPDAC
2009
ACM
161views Hardware» more  ASPDAC 2009»
15 years 4 months ago
Risk aversion min-period retiming under process variations
— Recent advances in statistical timing analysis (SSTA) achieve great success in computing arrival times under variations by extending sum and maximum operations to random variab...
Jia Wang, Hai Zhou
85
Voted
BMCBI
2007
197views more  BMCBI 2007»
14 years 10 months ago
Boolean networks using the chi-square test for inferring large-scale gene regulatory networks
Background: Boolean network (BN) modeling is a commonly used method for constructing gene regulatory networks from time series microarray data. However, its major drawback is that...
Haseong Kim, Jae K. Lee, Taesung Park