16 search results - page 3 / 4 » Statistical clock tree routing for robustness to process var... |
65
Voted
ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
Abstract-- Nanometer VLSI systems demand robust clock distribution network design for increased process and operating condition variabilities. In this paper, we propose minimum clo...
FPGA
2010
ACM
15 years 6 months ago
2010
ACM
Deep submicron processes have allowed FPGAs to grow in complexity and speed. However, such technology scaling has caused FPGAs to become more susceptible to the effects of process...
79
Voted
PATMOS
2007
Springer
15 years 3 months ago
2007
Springer
Abstract. The continuous miniaturization of semiconductor devices imposes serious threats to design robustness against process variations and environmental fluctuations. Modern ci...
ACSD
2005
IEEE
15 years 3 months ago
2005
IEEE
We present a bundled data communication scheme that is robust to crosstalk effects, and to manufacturing and environmental variations. Unlike a data bus, where each receiver alway...
SAC
2006
ACM
15 years 3 months ago
2006
ACM
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...