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» Statistical timing analysis based on a timing yield model
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DAC
2005
ACM
15 years 1 months ago
Circuit optimization using statistical static timing analysis
In this paper, we propose a new sensitivity based, statistical gate sizing method. Since circuit optimization effects the entire shape of the circuit delay distribution, it is dif...
Aseem Agarwal, Kaviraj Chopra, David Blaauw, Vladi...
ISQED
2007
IEEE
151views Hardware» more  ISQED 2007»
15 years 6 months ago
Gate Level Statistical Simulation Based on Parameterized Models for Process and Signal Variations
We propose gate level statistical simulation to bridge the gap between the most accurate Monte Carlo SPICE simulation and the most efficient circuit level statistical static timi...
Bao Liu
DATE
2007
IEEE
102views Hardware» more  DATE 2007»
15 years 6 months ago
Use of statistical timing analysis on real designs
A vast literature has been published on Statistical Static Timing Analysis (SSTA), its motivations, its different implementations and their runtime/accuracy trade-offs. However, v...
A. Nardi, Emre Tuncer, S. Naidu, A. Antonau, S. Gr...
ICCAD
2008
IEEE
125views Hardware» more  ICCAD 2008»
15 years 8 months ago
Practical, fast Monte Carlo statistical static timing analysis: why and how
Statistical static timing analysis (SSTA) has emerged as an essential tool for nanoscale designs. Monte Carlo methods are universally employed to validate the accuracy of the appr...
Amith Singhee, Sonia Singhal, Rob A. Rutenbar
ENVSOFT
2008
55views more  ENVSOFT 2008»
14 years 11 months ago
A simple algorithm for yield estimates: Evaluation for semi-arid irrigated winter wheat monitored with green leaf area index
In this study we investigated the perspective offered by coupling a simple vegetation growth model and ground-based remotely-sensed data for the monitoring of wheat production. A ...
Benoît Duchemin, Philippe Maisongrande, Gill...