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FPL
2001
Springer
107views Hardware» more  FPL 2001»
15 years 1 months ago
Gambit: A Tool for the Simultaneous Placement and Detailed Routing of Gate-Arrays
In this paper we present a new method of integrating the placement and routing stages in the physical design of channel-based architectures, and present the first implementation o...
John Karro, James P. Cohoon
ISSS
1996
IEEE
103views Hardware» more  ISSS 1996»
15 years 1 months ago
Instruction Set Design and Optimizations for Address Computation in DSP Architectures
In this paper we investigate the problem of code generation for address computation for DSP processors. This work is divided into four parts. First, we propose a branch instructio...
Guido Araujo, Ashok Sudarsanam, Sharad Malik
ATS
2004
IEEE
126views Hardware» more  ATS 2004»
15 years 1 months ago
Alternative Run-Length Coding through Scan Chain Reconfiguration for Joint Minimization of Test Data Volume and Power Consumptio
Test data volume and scan power are two major concerns in SoC test. In this paper we present an alternative run-length coding method through scan chain reconfiguration to reduce b...
Youhua Shi, Shinji Kimura, Nozomu Togawa, Masao Ya...
IJCAI
2001
14 years 10 months ago
Backbones in Optimization and Approximation
We study the impact of backbones in optimization and approximation problems. We show that some optimization problems like graph coloring resemble decision problems, with problem h...
John K. Slaney, Toby Walsh
AAAI
1998
14 years 10 months ago
Which Search Problems Are Random?
The typical difficulty of various NP-hard problems varies with simple parameters describing their structure. This behavior is largely independent of the search algorithm, but depe...
Tad Hogg