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ICPADS
2006
IEEE
14 years 8 days ago
Destination-Based HoL Blocking Elimination
Congestion management is likely to become a critical issue in interconnection networks, as increasing power consumption and cost concerns will lead to the use of smaller networks....
T. Nachiondo, Jose Flich, José Duato
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
13 years 10 months ago
Hardware Synthesis from C/C++ Models
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
Giovanni De Micheli
HIPC
2009
Springer
13 years 4 months ago
Distance-aware round-robin mapping for large NUCA caches
In many-core architectures, memory blocks are commonly assigned to the banks of a NUCA cache by following a physical mapping. This mapping assigns blocks to cache banks in a round-...
Alberto Ros, Marcelo Cintra, Manuel E. Acacio, Jos...
EUROPAR
2003
Springer
13 years 11 months ago
Parallel ScaLAPACK-Style Algorithms for Solving Continuous-Time Sylvester Matrix Equations
An implementation of a parallel ScaLAPACK-style solver for the general Sylvester equation, op(A)X −Xop(B) = C, where op(A) denotes A or its transpose AT , is presented. The paral...
Robert Granat, Bo Kågström, Peter Porom...
IEEEPACT
2007
IEEE
14 years 17 days ago
L1 Cache Filtering Through Random Selection of Memory References
Distinguishing transient blocks from frequently used blocks enables servicing references to transient blocks from a small fully-associative auxiliary cache structure. By inserting...
Yoav Etsion, Dror G. Feitelson