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GLVLSI
2008
IEEE
120views VLSI» more  GLVLSI 2008»
15 years 8 months ago
SAT-based equivalence checking of threshold logic designs for nanotechnologies
Novel nano-scale devices have shown promising potential to overcome physical barriers faced by complementary metaloxide semiconductor (CMOS) technology in future circuit design. H...
Yexin Zheng, Michael S. Hsiao, Chao Huang
EURODAC
1994
IEEE
122views VHDL» more  EURODAC 1994»
15 years 6 months ago
Compiled-code-based simulation with timing verification
Due to the complexity of today's systems, prototyping by simulation must be based on simulation-engine-like performance. It is proved by implementations that compiler-driven ...
Winfried Hahn, Andreas Hagerer, C. Herrmann
ATAL
2010
Springer
15 years 2 months ago
Resource-bounded alternating-time temporal logic
Many problems in AI and multi-agent systems research are most naturally formulated in terms of the abilities of a coalition of agents. There exist several excellent logical tools ...
Natasha Alechina, Brian Logan, Nguyen Hoang Nga, A...
CADE
2000
Springer
15 years 6 months ago
Two Techniques to Improve Finite Model Search
Abstract. This article introduces two techniques to improve the propagation efficiency of CSP based finite model generation methods. One approach consists in statically rewriting ...
Gilles Audemard, Belaid Benhamou, Laurent Henocque
128
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FUIN
2008
88views more  FUIN 2008»
15 years 1 months ago
Validating Behavioral Component Interfaces in Rewriting Logic
Many distributed applications can be understood in terms of components interacting in an open environment such as the Internet. Open environments are subject to change in unpredic...
Einar Broch Johnsen, Olaf Owe, Arild B. Torjusen