25 search results - page 3 / 5 » Streamlining Data Cache Access with Fast Address Calculation |
IWNAS
2006
IEEE
14 years 8 days ago
2006
IEEE
RDMA reduces network latency by eliminating unnecessary copies from network interface cards to application buffers, but how to reduce memory registration cost is a challenge. Prev...
TMC
2010
13 years 4 months ago
2010
We explore the use of clock skew of a wireless local area network access point (AP) as its fingerprint to detect unauthorized APs quickly and accurately. The main goal behind usi...
CORR
2008
Springer
13 years 6 months ago
2008
Springer
The practical realization of managing and executing large scale scientific computations efficiently and reliably is quite challenging. Scientific computations often invo...
ICS
2009
Tsinghua U.
14 years 1 months ago
2009
Tsinghua U.
The Cell BE is a multicore processor with eight vector accelerators (called SPEs) that implement explicit cache management through direct memory access engines. While the Cell has...
ISCAPDCS
2004
13 years 7 months ago
2004
Internet today, has transformed into a global information hub. The increase in its usage and magnitude have sparkled various research problems. Because of the diverse user populat...