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DAC
2012
ACM
13 years 6 months ago
Cache revive: architecting volatile STT-RAM caches for enhanced performance in CMPs
Spin-Transfer Torque RAM (STT-RAM) is an emerging non-volatile memory (NVM) technology that has the potential to replace the conventional on-chip SRAM caches for designing a more ...
Adwait Jog, Asit K. Mishra, Cong Xu, Yuan Xie, Vij...
ICCV
2005
IEEE
16 years 6 months ago
Creating Efficient Codebooks for Visual Recognition
Visual codebook based quantization of robust appearance descriptors extracted from local image patches is an effective means of capturing image statistics for texture analysis and...
Bill Triggs, Frédéric Jurie
ICIP
2003
IEEE
16 years 6 months ago
Adaptive system on a chip (ASOC): a backbone for power-aware signal processing cores
For motion estimation (ME) and discrete cosine transform (DCT) of MPEG video encoding, content variation and perceptual tolerance in video signals can be exploited to gracefully t...
Andrew Laffely, Jian Liang, Russell Tessier, Wayne...
ICPR
2006
IEEE
16 years 5 months ago
A Hierarchical Object Recognition System Based on Multi-scale Principal Curvature Regions
This paper proposes a new generic object recognition system based on multi-scale affineinvariant image regions. Image segments are obtained by a watershed transform of the princip...
Wei Zhang, Hongli Deng, Thomas G. Dietterich, Eric...
ICML
2009
IEEE
16 years 5 months ago
More generality in efficient multiple kernel learning
Recent advances in Multiple Kernel Learning (MKL) have positioned it as an attractive tool for tackling many supervised learning tasks. The development of efficient gradient desce...
Manik Varma, Bodla Rakesh Babu