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ASYNC
2002
IEEE
120views Hardware» more  ASYNC 2002»
15 years 3 months ago
Relative Timing Based Verification of Timed Circuits and Systems
Advanced clock-delayed1 and self-resetting domino circuits are becoming increasingly important design styles in aggressive synchronous as well as asynchronous design. Their design...
Peter A. Beerel, Ken S. Stevens, Hoshik Kim
ATAL
2006
Springer
15 years 1 months ago
Learning to identify winning coalitions in the PAC model
We consider PAC learning of simple cooperative games, in which the coalitions are partitioned into "winning" and "losing" coalitions. We analyze the complexity...
Ariel D. Procaccia, Jeffrey S. Rosenschein
TACAS
2004
Springer
122views Algorithms» more  TACAS 2004»
15 years 3 months ago
A Scalable Incomplete Test for the Boundedness of UML RT Models
Abstract. We describe a scalable incomplete boundedness test for the communication buffers in UML RT models. UML RT is a variant of the UML modeling language, tailored to describin...
Stefan Leue, Richard Mayr, Wei Wei
ICONIP
2010
14 years 7 months ago
Facial Expression Based Automatic Album Creation
With simple cost effective imaging solutions being widely available these days, there has been an enormous rise in the number of images consumers have been taking. Due to this incr...
Abhinav Dhall, Akshay Asthana, Roland Goecke
CASES
2006
ACM
15 years 4 months ago
Methods for power optimization in distributed embedded systems with real-time requirements
Dynamic voltage scaling and sleep state control have been shown to be extremely effective in reducing energy consumption in CMOS circuits. Though plenty of research papers have st...
Razvan Racu, Arne Hamann, Rolf Ernst, Bren Mochock...