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ASPDAC
2004
ACM
113views Hardware» more  ASPDAC 2004»
15 years 11 months ago
Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction
- Minimum area is one of the important objectives in technology mapping for lookup table-based FPGAs. It has been proven that the problem is NP-complete. This paper presents a poly...
Chi-Chou Kao, Yen-Tai Lai
183
Voted
DATE
2004
IEEE
128views Hardware» more  DATE 2004»
15 years 11 months ago
Synthesis for Manufacturability: A Sanity Check
As we move towards nanometer technology, manufacturing problems become overwhelmingly difficult to solve. Presently, optimization for manufacturability is performed at a post-synt...
Alessandra Nardi, Alberto L. Sangiovanni-Vincentel...
DATE
2004
IEEE
156views Hardware» more  DATE 2004»
15 years 11 months ago
Timing Analysis for Preemptive Multi-Tasking Real-Time Systems with Caches
In this paper, we propose an approach to estimate the Worst Case Response Time (WCRT) of tasks in a preemptive multi-tasking single-processor real-time system with a set associati...
Yudong Tan, Vincent John Mooney III
ECRTS
2004
IEEE
15 years 11 months ago
A Variable Rate Execution Model
We present a task model for adaptive real-time tasks in which a task's execution rate requirements are allowed to change at any time. The model, variable rate execution (VRE)...
Steve Goddard, Xin Liu
COORDINATION
2006
Springer
15 years 11 months ago
Automated Evaluation of Coordination Approaches
How to coordinate the processes in a complex component-based software system is a nontrivial issue. Many different coordination approaches exist, each with its own specific advanta...
Tibor Bosse, Mark Hoogendoorn, Jan Treur