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ISCAS
1999
IEEE
121views Hardware» more  ISCAS 1999»
15 years 1 months ago
The linear time-varying approach applied to a first-order dynamic translinear filter
Dynamic translinear (DTL) circuits use the exponential inputoutput relation of the transistor as a primitive for the synthesis of electronic circuits. As a consequence the analysi...
F. C. M. Kuijstermans, F. M. Diepstraten, Wouter A...
GLVLSI
2007
IEEE
151views VLSI» more  GLVLSI 2007»
15 years 1 months ago
Hand-in-hand verification of high-level synthesis
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...
TCAD
2002
121views more  TCAD 2002»
14 years 9 months ago
Robust Boolean reasoning for equivalence checking and functional property verification
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuits...
Andreas Kuehlmann, Viresh Paruthi, Florian Krohm, ...
GLVLSI
2007
IEEE
187views VLSI» more  GLVLSI 2007»
15 years 3 months ago
DAG based library-free technology mapping
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
Felipe S. Marques, Leomar S. da Rosa Jr., Renato P...
ICCAD
2004
IEEE
64views Hardware» more  ICCAD 2004»
15 years 6 months ago
Simultaneous design and placement of multiplexed chemical processing systems on microchips
Microchip structures represent an attractive platform for microscale chemical processing of fluidic systems. However, standardized design methods for these devices have not yet b...
Anton J. Pfeiffer, Tamal Mukherjee, Steinar Hauan