This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...
Jung-Wook Park, Gi-Ho Park, Sung-Bae Park, Shin-Du...
The novel design of an efficient FPGA interconnection architecture with multiple Switch Boxes (SB) and hardwired connections for realizing data intensive applications (i.e. DSP ap...
After developing a model free table recognition system we wanted to tune parameters in order to optimize the recognition performance. Therefore we developed a benchmarking environ...
This paper details a technique, called inter-block backtracking (IBB), which improves interval solving of decomposed systems with non-linear equations over the reals. This techniqu...
—Games built on Online Social Networks (OSNs) have become a phenomenon since 3rd party developer tools were exposed by OSNs such as Facebook. However, apart from their explosive ...