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81
Voted
DDECS
2007
IEEE
175views Hardware» more  DDECS 2007»
15 years 3 months ago
Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...
88
Voted
ICC
2007
IEEE
110views Communications» more  ICC 2007»
15 years 3 months ago
Resource Optimization to Provision a Virtual Private Network Using the Hose Model
— Virtual Private Networks (VPN) provide a secure and reliable communication between customer sites over a shared network. With increase in number and size of VPNs, providers nee...
Monia Ghobadi, Sudhakar Ganti, Gholamali C. Shoja
105
Voted
ISCA
2007
IEEE
177views Hardware» more  ISCA 2007»
15 years 3 months ago
Adaptive insertion policies for high performance caching
The commonly used LRU replacement policy is susceptible to thrashing for memory-intensive workloads that have a working set greater than the available cache size. For such applica...
Moinuddin K. Qureshi, Aamer Jaleel, Yale N. Patt, ...
WIKIS
2006
ACM
15 years 3 months ago
Semantic Wikipedia
Wikipedia is the world’s largest collaboratively edited source of encyclopaedic knowledge. But in spite of its utility, its contents are barely machine-interpretable. Structural...
Heiko Haller, Markus Krötzsch, Max Völke...
DAGSTUHL
1996
14 years 10 months ago
A Uniform Approach for Compile-Time and Run-Time Specialization
As partial evaluation gets more mature, it is now possible to use this program transformation technique to tackle realistic languages and real-size application programs. However, t...
Charles Consel, Luke Hornof, François No&eu...