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DATE
2006
IEEE
86views Hardware» more  DATE 2006»
15 years 4 months ago
Synthesis of system verilog assertions
In recent years, Assertion-Based Verification is being widely accepted as a key technology in the pre-silicon validation of system-on-chip(SOC) designs. The System Verilog langua...
Sayantan Das, Rizi Mohanty, Pallab Dasgupta, P. P....
DDECS
2006
IEEE
88views Hardware» more  DDECS 2006»
15 years 4 months ago
Minimization of Large State Spaces using Symbolic Branching Bisimulation
Abstract: Bisimulations in general are a powerful concept to minimize large finite state systems regarding some well-defined observational behavior. In contrast to strong bisimul...
Ralf Wimmer, Marc Herbstritt, Bernd Becker
SEFM
2006
IEEE
15 years 3 months ago
Modeling Heterogeneous Real-time Components in BIP
We present a methodology for modeling heterogeneous real-time components. Components are obtained as the superposition of three layers : Behavior, specified as a set of transitio...
Ananda Basu, Marius Bozga, Joseph Sifakis
HICSS
2005
IEEE
127views Biometrics» more  HICSS 2005»
15 years 3 months ago
Enterprise Architecture Analysis with XML
This paper shows how XML can be used for static and dynamic analysis of architectures. Our analysis is based on the distinction between symbolic and semantic models of architectur...
Frank S. de Boer, Marcello M. Bonsangue, Joost Jac...
ICMCS
2005
IEEE
101views Multimedia» more  ICMCS 2005»
15 years 3 months ago
Context-Aware Semantic Adaptation of Multimedia Presentations
In this paper, we present our work on contextaware semantic adaptation of multimedia structured documents. We propose semantic annotation of multimedia scenes, expressing semantic...
Mariam Kimiaei Asadi, Jean-Claude Dufourd