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ISCAS
2006
IEEE
116views Hardware» more  ISCAS 2006»
15 years 3 months ago
Signal processing for brain-computer interface: enhance feature extraction and classification
Abstract-In this paper we present a new scheme for brain imaginary movement invovles sophisticated spatial-temporalsignal processing and classification for electroencephalogram spe...
Haihong Zhang, Cuntai Guan, Yuanqing Li
ACISP
2006
Springer
15 years 3 months ago
Towards Provable Security for Ubiquitous Applications
Abstract. The emergence of computing environments where smart devices are embedded pervasively in the physical world has made possible many interesting applications and has trigger...
Mike Burmester, Tri Van Le, Breno de Medeiros
79
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CASES
2006
ACM
15 years 3 months ago
High-level power analysis for multi-core chips
Technology trends have led to the advent of multi-core chips in the form of both general-purpose chip multiprocessors (CMPs) and embedded multi-processor systems-on-a-chip (MPSoCs...
Noel Eisley, Vassos Soteriou, Li-Shiuan Peh
SIGSOFT
2006
ACM
15 years 3 months ago
Bit level types for high level reasoning
Bitwise operations are commonly used in low-level systems code to access multiple data fields that have been packed into a single word. Program analysis tools that reason about s...
Ranjit Jhala, Rupak Majumdar
GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
15 years 3 months ago
A first look at the interplay of code reordering and configurable caches
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
Ann Gordon-Ross, Frank Vahid, Nikil Dutt