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» Structure-Preserving Model Reduction
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142
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IPPS
1999
IEEE
15 years 7 months ago
Reducing Parallel Overheads Through Dynamic Serialization
If parallelism can be successfully exploited in a program, significant reductions in execution time can be achieved. However, if sections of the code are dominated by parallel ove...
Michael Voss, Rudolf Eigenmann
116
Voted
FPGA
1998
ACM
125views FPGA» more  FPGA 1998»
15 years 7 months ago
Timing Driven Floorplanning on Programmable Hierarchical Targets
The goal of this paper is to perform a timing optimization of a circuit described by a network of cells on a target structure whose connection delays have discrete values following...
S. A. Senouci, A. Amoura, Helena Krupnova, Gabriel...
126
Voted
FTP
1998
Springer
15 years 7 months ago
Issues of Decidability for Description Logics in the Framework of Resolution
Abstract. We describe two methods on the basis of which efficient resolution decision procedures can be developed for a range of description logics. The first method uses an orderi...
Ullrich Hustadt, Renate A. Schmidt
142
Voted
ITS
1998
Springer
129views Multimedia» more  ITS 1998»
15 years 7 months ago
Cognitive Measures for Visual Concept Teaching with Intelligent Tutoring Systems
Abstract: This article reports on the application of general cognitive measures to describe and order the knowledge base of radiological images, aimed at the teaching of visual con...
Andrey R. Pimentel, Alexandre I. Direne
122
Voted
DAC
1997
ACM
15 years 7 months ago
Hardware/Software Co-Simulation in a VHDL-Based Test Bench Approach
Novel test bench techniques are required to cope with a functional test complexity which is predicted to grow much more strongly than design complexity. Our test bench approach at...
Matthias Bauer, Wolfgang Ecker