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» Structure-Preserving Model Reduction
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DATE
2010
IEEE
193views Hardware» more  DATE 2010»
15 years 3 months ago
Coordinated resource optimization in behavioral synthesis
Abstract—Reducing resource usage is one of the most important optimization objectives in behavioral synthesis due to its direct impact on power, performance and cost. The datapat...
Jason Cong, Bin Liu, Junjuan Xu
ISCA
1997
IEEE
90views Hardware» more  ISCA 1997»
15 years 2 months ago
The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems
Current microprocessors aggressively exploit instructionlevel parallelism (ILP) through techniques such as multiple issue, dynamic scheduling, and non-blocking reads. Recent work ...
Parthasarathy Ranganathan, Vijay S. Pai, Hazim Abd...
ISPD
1997
ACM
110views Hardware» more  ISPD 1997»
15 years 2 months ago
Performance driven global routing for standard cell design
Advances in fabrication technology have resulted in a continual shrinkage of device dimensions. This has resulted in smaller device delays, greater resistance along interconnect w...
Jason Cong, Patrick H. Madden
CF
2006
ACM
15 years 1 months ago
Landing openMP on cyclops-64: an efficient mapping of openMP to a many-core system-on-a-chip
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
Juan del Cuvillo, Weirong Zhu, Guang R. Gao
ASPLOS
2008
ACM
14 years 12 months ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August